The subject matter of the present application relates to semiconductor devices. More specifically, the present application relates to reinforcing the edge of an integrated circuit to obviate cracks in layers of the integrated circuit during separation.
Microelectronic elements, e.g., semiconductor chips, are thin, flat elements which can incorporate integrated circuits including active semiconductor devices such as transistors, diodes, etc., and wiring which provides electrical interconnections. Semiconductor chips may also or alternatively include passive devices such as capacitors, inductors or resistors. In particular constructions, a microelectronic element can include one or more semiconductor chips and have electrically conductive elements electrically connected with contacts of the one or more semiconductor chips, the contacts being exposed at a surface of the microelectronic element.
Microelectronic elements are typically manufactured in wafer form. Once the wafer is formed, the wafer may then be diced to free the individually packaged microelectronic elements, i.e., die. One of the complications that arise when the wafer is separated is the presence of microdefects. Microdefects commonly occur around the periphery of each microelectronic element, e.g., semiconductor chip, due to stresses at the edge surfaces of each of the microelectronic elements. For example, without limitation, such defects can include cracks in the microelectronic element, surface roughness, sharp edge points, uneven surfaces, and the like. Such microdefects can occur in the microelectronic element at any point it time. For example, the dicing process produces microdefects that can develop into cracks and more serious defects. These microdefects may occur at any time later in the lifecycle of the chip, i.e., during processes for packaging, or testing the chip, or later in actual operation of the chip.
Various structures and methods have been devised to minimize crack stresses. For example, internal seal rings have been used in the prior art to prevent cracking at the exterior edges of the semiconductor chip. Methods that have been used to separate wafers into individual chips include mechanical blade dicing; mechanical scribing and then breaking; dicing before grinding; laser scribing and breaking; stealth dicing; laser full-cut dicing, and plasma dicing. Nonetheless, despite these and other improvements in the art, there is still room for improved microelectronic elements and methods of making microelectronic elements.